ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 265

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ATMEGA64M1-15MZ

Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA64M1-15MZ

Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details
20.4.2
7647G–AVR–09/11
Analog Comparator 1Control Register – AC1CON
Table 20-2.
Bit
Read/Write
Initial Value
• Bit 7– AC1EN: Analog Comparator 1 Enable Bit
Set this bit to enable the analog comparator 1.
Clear this bit to disable the analog comparator 1.
• Bit 6– AC1IE: Analog Comparator 1 Interrupt Enable bit
Set this bit to enable the analog comparator 1 interrupt.
Clear this bit to disable the analog comparator 1 interrupt.
• Bit 5, 4– AC1IS1, AC1IS0: Analog Comparator 1 Interrupt Select bit
These 2 bits determine the sensitivity of the interrupt trigger.
The different setting are shown in
Table 20-3.
• Bit 3– AC1ICE: Analog Comparator 1 Interrupt Capture Enable bit
Set this bit to enable the input capture of the Timer/Counter1 on the analog comparator event.
The comparator output is in this case directly connected to the input capture front-end logic,
making the comparator utilize the noise canceler and edge select features of the
Timer/Counter1 Input Capture interrupt. To make the comparator trigger the Timer/Counter1
Input Capture interrupt, the ICIE1 bit in the Timer Interrupt Mask Register (TIMSK1) must be
set.
AC0M2
0
0
0
0
1
1
1
1
AC1IS1
0
0
1
1
Analog Comparator 0 negative input selection
Interrupt sensitivity selection
AC1IS0
0
1
0
1
AC0M1
0
0
1
1
0
0
1
1
AC1EN
R/W
7
0
AC1IE
R/W
6
0
Description
Comparator Interrupt on output toggle
Reserved
Comparator interrupt on output falling edge
Comparator interrupt on output rising edge
AC0M0
0
1
0
1
0
1
0
1
AC1IS1
R/W
Table
5
0
Atmel ATmega16/32/64/M1/C1
18-7.
AC1IS0
Description
“Vref”/6.40
“Vref”/3.20
“Vref”/2.13
“Vref”/1.60
Bandgap (1.1V)
DAC result
Analog Comparator Negative Input (ACMPM pin)
Reserved
R/W
4
0
AC1ICE
R/W
3
0
AC1M2
R/W
2
0
AC1M1
R/W
1
0
AC1M0
R/W
0
0
AC1CON
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