ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 28

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

4.4
4.5
4.5.1
4.5.2
4.5.3
28
I/O Memory
General Purpose I/O Registers
Atmel ATmega16/32/64/M1/C1
General Purpose I/O Register 0 – GPIOR0
General Purpose I/O Register 1 – GPIOR1
General Purpose I/O Register 2 – GPIOR2
The I/O space definition of the ATmega16/32/64/M1/C1 is shown in
page
All ATmega16/32/64/M1/C1 I/Os and peripherals are placed in the I/O space. All I/O locations
may be accessed by the LD/LDS/LDD and ST/STS/STD instructions, transferring data
between the 32 general purpose working registers and the I/O space. I/O registers within the
address range 0x00 - 0x1F are directly bit-accessible using the SBI and CBI instructions. In
these registers, the value of single bits can be checked by using the SBIS and SBIC instruc-
tions. Refer to the instruction set section for more details. When using the I/O specific
commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O
registers as data space using LD and ST instructions, 0x20 must be added to these
addresses. The ATmega16/32/64/M1/C1 is a complex microcontroller with more peripheral
units than can be supported within the 64 location reserved in Opcode for the IN and OUT
instructions. For the Extended I/O space from 0x60 - 0xFF in SRAM, only the ST/STS/STD
and LD/LDS/LDD instructions can be used.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the status flags are cleared by writing a logical one to them. Note that, unlike most
other AVR’s, the CBI and SBI instructions will only operate on the specified bit, and can there-
fore be used on registers containing such status flags. The CBI and SBI instructions work with
registers 0x00 to 0x1F only.
The I/O and peripherals control registers are explained in later sections.
The ATmega16/32/64/M1/C1 contains four General Purpose I/O Registers. These registers
can be used for storing any information, and they are particularly useful for storing global vari-
ables and status flags.
The General Purpose I/O Registers, within the address range 0x00 - 0x1F, are directly
bit-accessible using the SBI, CBI, SBIS, and SBIC instructions.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
347.
GPIOR07 GPIOR06 GPIOR05 GPIOR04 GPIOR03 GPIOR02 GPIOR01 GPIOR00
GPIOR17 GPIOR16 GPIOR15 GPIOR14 GPIOR13 GPIOR12 GPIOR11 GPIOR10
GPIOR27 GPIOR26 GPIOR25 GPIOR24 GPIOR23 GPIOR22 GPIOR21 GPIOR20
R/W
R/W
R/W
7
0
7
0
7
0
R/W
R/W
R/W
6
0
6
0
6
0
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
“Register Summary” on
R/W
R/W
R/W
0
0
0
0
0
0
GPIOR0
GPIOR1
GPIOR2
7647G–AVR–09/11