ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 77

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ATMEGA64M1-15MZ

Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA64M1-15MZ

Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details
7647G–AVR–09/11
OC1A, Output Compare Match A output: This pin can serve as an external output for the
Timer/Counter1 Output Compare A. The pin has to be configured as an output (DDD2 set
“one”) to serve this function. The OC1A pin is also the output pin for the PWM mode timer
function.
MISO_A: Master Data input, Slave Data output pin for SPI channel. When the SPI is enabled
as a master, this pin is configured as an input regardless of the setting of DDD2. When the SPI
is enabled as a slave, the data direction of this pin is controlled by DDD2. When the pin is
forced to be an input, the pull-up can still be controlled by the PORTD2 bit.
PCINT18, Pin Change Interrupt 18.
• PCINT17/PSCIN0/CLKO – Bit 1
PCSIN0, PSC Digital Input 0.
CLKO, Divided System Clock: The divided system clock can be output on this pin. The divided
system clock will be output if the CKOUT Fuse is programmed, regardless of the PORTD1 and
DDD1 settings. It will also be output during reset.
PCINT17, Pin Change Interrupt 17.
• PCINT16/PSCOUT0A – Bit 0
PSCOUT0A: Output 0 of PSC 0.
PCINT16, Pin Change Interrupt 16.
Table 9-10
shown in
Table 9-10.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
Figure 9-5 on page
and
Overriding Signals for Alternate Functions PD7..PD4
Table 9-11
PD7/
ACMP0/
PCINT23
0
0
0
0
0
0
ACMP0D
0
ACOMP0
relates the alternate functions of Port D to the overriding signals
67.
PD6/ADC3/
ACMPN2/INT0/
PCINT22
0
0
0
0
0
0
ADC3D + In0en
In0en
INT0
ADC3
ACMPM
Atmel ATmega16/32/64/M1/C1
PD5/ADC2/
ACMP2/PCINT21
0
0
0
0
0
0
ADC2D
0
ADC2
ACOMP2
PD4/ADC1/RXD/
RXLIN/ICP1A/
SCK_A/PCINT20
RXEN + SPE •
MSTR • SPIPS
PD4 •
PUD
RXEN + SPE •
MSTR • SPIPS
0
SPE • MSTR •
SPIPS
ADC1D
0
ICP1A
ADC1
77

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