ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 185

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

16.8.2
7647G–AVR–09/11
CANSTMOB.6
CANSTMOB.5
CANSTMOB.4
CANSTMOB.3
CANSTMOB.2
CANSTMOB.1
CANSTMOB.0
CANGIT.4
CANGIT.3
CANGIT.2
CANGIT.1
CANGIT.0
CANGIT.6
CANGIT.5
Interrupt Behavior
OVRTIM
TXOK[i]
RXOK[i]
BERR[i]
CERR[i]
AERR[i]
SERR[i]
FERR[i]
BXOK
CERG
AERG
BOFFI
SERG
FERG
CANGIE.4
Figure 16-14. CAN Controller Interrupt Structure
When an interrupt occurs, an interrupt flag bit is set in the corresponding MOb-CANSTMOB
register or in the general CANGIT register. If in the CANIE register, ENRX / ENTX / ENERR bit
are set, then the corresponding MOb bit is set in the CANSITn register.
To acknowledge a MOb interrupt, the corresponding bits of CANSTMOB register (RXOK,
TXOK,...) must be cleared by the software application. This operation needs a read-mod-
ify-write software routine.
To acknowledge a general interrupt, the corresponding bits of CANGIT register (BXOK, BOF-
FIT,...) must be cleared by the software application. This operation is made writing a logical
one in these interrupt flags (writing a logical zero doesn’t change the interrupt flag value).
OVRTIM interrupt flag is reset as the other interrupt sources of CANGIT register and is also
reset entering in its dedicated interrupt handler.
When the CAN node is in transmission and detects a Form Error in its frame, a bit Error will
also be raised. Consequently, two consecutive interrupts can occur, both due to the same
error. When a MOb error occurs and is set in its own CANSTMOB register, no general error is
set in CANGIT register.
ENTX
CANGIE.5
ENRX
CANGIE.3
CANGIE.2
ENERR
ENBX
CANGIE.1
ENERG
CANSIT 1/2
SIT[i]
Atmel ATmega16/32/64/M1/C1
CANGIE.6
ENBOFF
CANIE 1/2
IEMOB[i]
0
i
CANGIT.7
CANIT
CANGIE.7
CANGIE.0
ENOVRT
ENIT
CAN IT
OVR IT
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