ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 116

• Manufacturer Part Number: ATMEGA64M1-15MZ
• Description: MCU AVR 64KB FLASH 3PSC 32-VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA64M1-15MZ

• Package / Case: 32-VQFN
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Speed: 16MHz
• Eeprom Size: 2K x 8
• Core Processor: AVR
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Program Memory Size: 64KB (64K x 8)
• Data Converters: A/D 11x10b; D/A 1x10b
• Oscillator Type: Internal
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Connectivity: CAN, LIN, SPI, UART/USART
• Core Size: 8-Bit
• Processor Series: ATMEGA64x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Lead Free Status / Rohs Status: Details

13.5.4
13.6
116
Output Compare Units
Atmel ATmega16/32/64/M1/C1
Using the Input Capture Unit as TCNT1 Retrigger Input
Measurement of an external signal’s duty cycle requires that the trigger edge is changed after
each capture. Changing the edge sensing must be done as early as possible after the ICRn
Register has been read. After a change of the edge, the Input Capture Flag (ICFn) must be
cleared by software (writing a logical one to the I/O bit location). For measuring frequency
only, the clearing of the ICFn Flag is not required (if an interrupt handler is used).
TCNT1 counts from BOTTOM to TOP. The TOP value can be a fixed value, ICR1, or OCR1A.
When enabled the Retrigger Input forces to reach the TOP value. It means that ICF1 output is
ored with the TOP signal.
The 16-bit comparator continuously compares TCNTn with the Output Compare Register
(OCRnx). If TCNT equals OCRnx the comparator signals a match. A match will set the Output
Compare Flag (OCFnx) at the next timer clock cycle. If enabled (OCIEnx = 1), the Output
Compare Flag generates an Output Compare interrupt. The OCFnx Flag is automatically
cleared when the interrupt is executed. Alternatively the OCFnx Flag can be cleared by soft-
ware by writing a logical one to its I/O bit location. The Waveform Generator uses the match
signal to generate an output according to operating mode set by the Waveform Generation
mode (WGMn3:0) bits and Compare Output mode (COMnx1:0) bits. The TOP and BOTTOM
signals are used by the Waveform Generator for handling the special cases of the extreme
values in some modes of operation
A special feature of Output Compare unit A allows it to define the Timer/Counter TOP value
(i.e., counter resolution). In addition to the counter resolution, the TOP value defines the
period time for waveforms generated by the Waveform Generator.
Figure 13-4
and bit names indicates the device number (n = n for Timer/Counter n), and the “x” indicates
Output Compare unit (x). The elements of the block diagram that are not directly a part of the
Output Compare unit are gray shaded.
shows a block diagram of the Output Compare unit. The small “n” in the register
(See “16-bit Timer/Counter1 with PWM” on page
7647G–AVR–09/11
107.)