ATMEGA64M1-15MZ Atmel, ATMEGA64M1-15MZ Datasheet - Page 249

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ATMEGA64M1-15MZ

Manufacturer Part Number
ATMEGA64M1-15MZ
Description
MCU AVR 64KB FLASH 3PSC 32-VQFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA64M1-15MZ

Package / Case
32-VQFN
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 11x10b; D/A 1x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Connectivity
CAN, LIN, SPI, UART/USART
Core Size
8-Bit
Processor Series
ATMEGA64x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
4 KB
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATADAPCAN01
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of I /o
-
Lead Free Status / Rohs Status
 Details
18.9.4
18.9.4.1
18.9.4.2
18.9.5
7647G–AVR–09/11
ADC Result Data Registers – ADCH and ADCL
Digital Input Disable Register 0 – DIDR0
ADLAR = 0
ADLAR = 1
When an ADC conversion is complete, the conversion results are stored in these two result
data registers.
When the ADCL register is read, the two ADC result data registers can’t be updated until the
ADCH register has also been read.
Consequently, in 10-bit configuration, the ADCL register must be read first before the ADCH.
Nevertheless, to work easily with only 8-bit precision, there is the possibility to left adjust the
result thanks to the ADLAR bit in the ADCSRA register. Like this, it is sufficient to only read
ADCH to have the conversion result.
• Bit 7:0 – ADC7D..ADC0D, ACMPN0D, ACMPN1D, ACMPN2D, ACMPN3D, ACMP2D,
When this bit is written logic one, the digital input buffer on the corresponding ADC pin is dis-
abled. The corresponding PIN Register bit will always read as zero when this bit is set. When
an analog signal is applied to the ADC7..0 pin and the digital input from this pin is not needed,
this bit should be written logic one to reduce power consumption in the digital input buffer.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
AMP2ND:
ADC7:0, ACMPN0, ACMPN1, ACMPN2, ACMPN3, ACMP2, AMP2N Digital Input Disable
ADC7D
ADC7
ADC9
ADC1
R/W
R
R
R
R
7
0
7
0
0
7
0
0
-
ACMPN1D
AMP2ND
ADC6D
ADC6
ADC8
ADC0
R/W
R
R
6
0
R
R
6
0
0
6
0
0
-
ACMPN0D
ADC5D
ADC5
ADC7
R/W
R
R
5
0
5
0
0
R
R
5
0
0
-
-
Atmel ATmega16/32/64/M1/C1
ADC4D
ADC4
ADC6
R/W
R
R
R
R
4
0
4
0
0
4
0
0
-
-
ACMPN2D
ADC3D
ADC3
ADC5
R/W
R
R
R
R
3
0
3
0
0
3
0
0
-
-
ACMP2D
ADC2D
ADC2
ADC4
R/W
R
R
2
0
2
0
0
2
R
R
0
0
-
-
ADC1D
ADC9
ADC1
ADC3
R/W
R
R
1
0
1
0
0
R
R
1
0
0
-
ACMPN3D
ADC0D
ADC8
ADC0
ADC2
R/W
R
R
0
0
0
0
0
R
R
0
0
0
-
ADCH
ADCL
ADCH
ADCL
DIDR0
249

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