L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 277

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Preliminary Data Sheet
April 2006
Agere Systems Inc.
Appendix B: Configuration
Bridging
Identifying Upper Nodes. The method for identifying which upper node is associated with any particular pair of
adjacent leaf nodes is to first identify the appropriate level of hierarchy and then the node within that level. The
hierarchy level is identified by taking the exclusive OR of the index values of the two leaf nodes under consider-
ation and then counting the number of ones in the result. The number of ones indicates the number of levels that
much be traversed from the leaf node level.
For example, the upper node associated with nodes 4.9 and 4.10 is identified by the XOR of 9 (1001
(1010
(level 2). To identify the index at that level, use the smaller of the two leaf node index values (9, in this example)
and shift it to the right by the number of levels that must be traversed upwards (2, in this example). 1001
10
Address Aging
An address aging table (Layer_2_Time_Stamp_Table) is used to keep track of the time that has elapsed since the
observation of each MAC source address. Source addresses that have not been seen in a receive packet for a cer-
tain period of time may be deleted from the address table by the supervisor.
When a Layer 2 source address matches an entry in the address table, its corresponding entry in
Layer_2_Time_Stamp_Table is updated with the current value of Layer_2_Current_Time.
Periodically, the supervisor scans through the time stamp table, looking for entries that are equal to the next value
of Layer_2_Current_Time. These entries correspond to address table entries that are set to expire upon the next
incrementing of Layer_2_Current_Time. Once the supervisor has deleted these entries, it may increment
Layer_2_Current_Time.
Note: There is a one-to-one correlation between address table entries and aging table entries. As entries in the
Destination Maps
A 58-bit wide vector is used to specify the destinations for forwarded packets. The least significant (right-most)
50 bits each correspond to one of the ET4148-50’s Ethernet ports. Bits 0 through 47 correspond to the 48
10/100/1000 Mbits/s Ethernet ports whereas bits 48 and 49 correspond to the two 10 Gbits/s Ethernet ports.
The most significant 8 bits (bits 50 through 57) of the 58-bit vector correspond to the eight queues that are dedi-
cated to the supervisor. Each of these queues may be dedicated to a particular purpose (e.g., address learning,
logging, BPDU reception, etc.).
The initial destination map is retrieved from the Layer_2_Dest_Map_Table register. This table is addressed by the
dest_map_index_{0..1}[8:0] value retrieved from the Layer_2_Key_Table_6 record that contains a key
that matches the destination address of the receive packet.
For unicast packets (i.e., a single destination port), only one bit in the destination map is asserted. For multicast
packets, multiple bits may be asserted. Each asserted bit represents an intended destination.
Certain subsequent filtering and processing steps that follow the establishment of the initial destination map may
serve to add or delete (assert or deassert, respectively) destinations to or from the bit map.
2
= 2. Hence, the upper-level node associated with leaf nodes 4.9 and 4.10 is node 2.2.
2
address table are swapped to allow for the sorting of new entries, the same swap operations must be per-
formed on the time stamp table.
) = 0011
(continued)
2
. The two asserted bits means that the upper-level node is two levels above the leaf node level
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
(continued)
Agere Systems - Proprietary
2
ET4148-50
) and 10
2
>> 2 =
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