L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 272

no-image

L-ET4148-50C-DB

Manufacturer Part Number
L-ET4148-50C-DB
Description
Manufacturer
LSI
Datasheet

Specifications of L-ET4148-50C-DB

Lead Free Status / RoHS Status
Supplier Unconfirmed
ET4148-50
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
Appendix B: Configuration
Ethernet Interfaces
For a single-port aggregate (really, a port that is not a part of any aggregate), the bits that correspond to that port
are deasserted (not masking) for all of the Layer_2_Aggregation_Mask_Table entries. In other words, regard-
less of which table entry is selected by the arithmetic reduction of the packet’s MAC destination and source
address values, the destination port is never masked by the aggregation mask table.
For an eight-port aggregate, each aggregation mask table entry enables just one of the eight ports (note the
marching zero in the table above). Each mask bit in the 8-bit values shown above corresponds to one of the eight
ports in the aggregate.
Note: Neither the destination maps nor the aggregation masks impose any limits about which ports may be desig-
Port Only Mapping. Should the preceding methods for assigning a VLAN index to a receive packet fail, the
receive port’s default VLAN index is used. This value is established on a per-port basis via the Port_Mode_{0..6}
registers.
VLAN Masks. 256 VLAN masks are available that are applied to the 58-bit destination map during the bridging
process. (See Destination Maps on page 277.) These masks are configured via the Layer_2_Vlan_Mask_Table
register. The receive packet’s VLAN index is used to select the appropriate VLAN mask. The mask is then used to
eliminate all destinations that are not members of the packet’s VLAN.
Port Mirroring
To aid in the analysis of network behavior, ports may have their receive and transmit activity copied to a designated
mirror port.
Designating a Mirror Port. A port is designated as the system’s mirror port by writing its port number to the
Layer_2_Mirror_Port register. When a receive packet is to be mirrored, the designated port is added to the
58-bit destination port map by the ET4148-50.
Designating a port as a mirror port does not automatically prevent that port from being used for normal forwarding
purposes. In order to dedicate a port solely to mirroring, it is essential that the address table and/or destination port
maps be updated to eliminate the mirror port as a valid destination.
If multiple ports are selected to be mirrored (i.e., their activity is copied to the designated mirror port), it is possible
that the aggregate of the mirrored ports’ bandwidth may exceed that of the mirror port. If this condition persists for
an extended period, the packet buffer may become congested and packets may be discarded. In this case, the
inclusion of a mirror port may adversely affect the behavior of the mirrored ports.
If both the transmit and receive ports for a particular packet are being mirrored, only one copy of the packet is sent
to the mirror port.
Receive Mirroring. To mirror the receive activity of a port, it is merely required that its corresponding bit in
Layer_2_Src_Mirror_Map be asserted. Once this is done, all packets received by the mirrored port are copied to
the designated mirror port.
Transmit Mirroring. To mirror the transmit activity of a port, it is merely required that its corresponding bit in
Layer_2_Dest_Mirror_Map be asserted. Once this is done, all packets transmitted by the mirrored port are cop-
ied to the designated mirror port.
Note: The packet transmitted by the mirror port may not exactly match the packet transmitted by a mirrored port if
272
nated to be a member of a particular aggregate. The ports in an aggregate need not be adjacent ports nor
need they even be equivalent ports.
the VLAN modes and configurations of the two ports differ.
(continued)
(continued)
Agere Systems - Proprietary
Preliminary Data Sheet
Agere Systems Inc.
April 2006

Related parts for L-ET4148-50C-DB