L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 177

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

Preliminary Data Sheet
April 2006
Agere Systems Inc.
Appendix A: Registers
Packet_Buffer_Queue_Depth_{0..3} (Revision C Only)
Description: The number of entries in each queue.
Table 236. Packet_Buffer_Queue_Depth_{0..3} Register Parameters
Table 237. Packet_Buffer_Queue_Depth_{0..3} Field Parameters
This register provides the supervisor with the number of buffers that are currently associated with each of the
queues. The queues are grouped according to the following table.
Base Address
Register Size
Register Instances
Register Spacing
Record Size
Record Instances
Record Spacing
queue_depth[12:0]
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
1
Field Name
Parameter
2
3
4
Figure 170. Packet_Buffer_Queue_Depth_{0..3} Register Diagram
5
6
7
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
(continued)
8
9
10
Agere Systems - Proprietary
Instances = 1
Offset = 0.19
Mode = R/W
11
Parameter
0x000C_D000
12
Value
13
428
512
107
4
4
4
14
15
16
17
The depth of the corresponding queue in packets.
18
19
20
21
queue_depth[12:0]
22
23
8
Description
24
7
25
6
26
5
27
4
28
3
29
2
ET4148-50
30
1
31
0
177