L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 196

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ET4148-50
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
Appendix A: Registers
Policer_Flow_Mode_Table_{0..4}
Description: This table per-flow mode settings.
Table 271. Policer_Flow_Mode_Table_{0..4} Register Parameters
Table 272. Policer_Flow_Mode_Table_{0..4} Field Parameters
This register provides an assortment of flow-specific mode settings. For the channelized packet_processor
modules (numbers 0 through 4), the eighty policer mode sets are allocated eight per channel. Policers 0 through 7
are allocated to channel 0, policers 8 through 15 to channel 1, etc.
For the nonchannelized packet_processor modules (numbers 5 and 6), all eighty policer mode sets are allo-
cated to the eighty policers of the single channel.
196
Base Address
Register Size
Register Instances
Register Spacing
Record Size
Record Instances
Record Spacing
discard_out_of_profile_en
discard_out_of_profile_when_
congested_en
demote_out_of_profile_en
REFERENCE
0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
Field Name
PORT
Parameter
1
2
XG1
60
3
4
XG0
50
Figure 200. Policer_Flow_Mode_Table_{0..4} Register Diagram
5
SU1
49
6
SU0
7
48
(continued)
8
G47
Mode = R/W
Offset = 0.29
Instances = 80
Spacing = 4.0
Mode = R/W
Offset = 0.30
Instances = 80
Spacing = 4.0
Mode = R/W
Offset = 0.31
Instances = 80
Spacing = 4.0
47
Figure 201. Port Numbering Scheme
9
PORT NUMBERING SCHEME
Parameters
G46
10
46
Agere Systems - Proprietary
11
G45
0x0004_d800
45
12
32768
Value
G44
44
13
320
80
5
4
4
14
15
This bit enables the discarding of packets that are out
of profile. A packet is out of profile if its contribution to a
flow’s short term average bandwidth causes that aver-
age to exceed the flow’s user-defined limit.
This bit enables the discarding of packets that are out
of profile while the switch is congested. The switch is
considered congested when the number of available
packet buffer, packet queue or packet descriptor
resources falls below user-defined thresholds.
This bit enables the demotion of packets that are out of
profile. When a packet is demoted, it is transmitted at a
lower-priority level.
16
17
G3
3
18
19
G2
2
20
G1
1
21
22
G0
0
Description
23
8
24
7
G = 10/100/1000 Mbits/s PORT
XG = 10 Gbits/s PORT
SU = SUPERVISOR
Preliminary Data Sheet
25
6
26
5
27
4
Agere Systems Inc.
28
3
29
2
April 2006
30
1
31
0