L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 128

• Manufacturer Part Number: L-ET4148-50C-DB
• Manufacturer: LSI

Specifications of L-ET4148-50C-DB

• Lead Free Status / RoHS Status: Supplier Unconfirmed

ET4148-50
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
Appendix A: Registers
Layer_2_Time_Stamp_Table
Description: The MAC address table’s time stamps.
Table 155. Layer_2_Time_Stamp_Table Register Parameters
Table 156. Layer_2_Time_Stamp_Table Field Parameters
This table holds the time stamps for the MAC address table. Whenever an address in the MAC address table is
seen in a received packet as a source address and the received packet’s source port matches the source port
information in the address table, the time stamp value in this table that corresponds to that MAC address table
entry is updated with the current time value. The current time value is established by Layer_2_Current_Time.
128
Base Address
Register Size
Register Instances
Register Spacing
Record Size
Record Instances
Record Spacing
time_stamp[3:0]
0
Parameter
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
0
1
Field Name
2
3
4
5
6
Figure 117. Layer_2_Time_Stamp_Table Register Diagram
7
(continued)
8
9
10
0x000b_8000
Instances = 1
Offset = 0.28
11
Mode = R/W
Parameters
Agere Systems - Proprietary
32768
Value
8192
NA
12
1
4
4
13
14
15
16
17
The time stamp value for the corresponding MAC
source address.
18
19
20
21
22
9
Description
23
8
24
7
Preliminary Data Sheet
25
6
26
5
Agere Systems Inc.
27
4
time_stamp[3:0]
28
3
29
April 2006
2
30
1
31
0