L-ET4148-50C-DB LSI, L-ET4148-50C-DB Datasheet - Page 253
L-ET4148-50C-DB
Manufacturer Part Number
L-ET4148-50C-DB
Description
Manufacturer
LSI
Datasheet
1.L-ET4148-50C-DB.pdf
(298 pages)
Specifications of L-ET4148-50C-DB
Lead Free Status / RoHS Status
Supplier Unconfirmed
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Preliminary Data Sheet
April 2006
Agere Systems Inc.
Appendix A: Registers
Tx_Packets
Description: Statistics counters.
Table 354. Tx_Packets Register Parameters
Table 355. Tx_Packets Field Parameters
Base Address
Register Size
Register Instances
Register Spacing
Record Size
Record Instances
Record Spacing
tx_unicast_packets[21:0]
tx_multicast_packets[21:0]
tx_broadcast_packets[21:0]
tx_pause_packets[21:0]
12
0
4
8
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
0
Parameter
1
Field Name
2
3
4
5
6
7
Single-Chip 48 x 1 Gbit/s + 2 x 10 Gbits/s Layer 2+ Ethernet Switch
(continued)
8
Figure 266. Tx_Packets Register Diagram
9
0x0004_6000
10
Spacing = 16.0
Spacing = 16.0
Spacing = 16.0
Spacing = 16.0
Agere Systems - Proprietary
Instances = 50
Instances = 50
Instances = 50
Instances = 50
Offset = 12.10
Offset = 0.10
Offset = 4.10
Offset = 8.10
Mode = R/W
Mode = R/W
Mode = R/W
Mode = R/W
Parameters
11
Value
800
800
NA
NA
1
1
12
13
14
15
16
17
The number of unicast packets transmitted.
The number of multicast packets transmitted.
The number of broadcast packets transmitted.
The number of pause control packets transmitted.
tx_broadcast_packets[21:0]
tx_multicast_packets[21:0]
tx_unicast_packets[21:0]
tx_pause_packets[21:0]
18
19
20
21
22
23
8
Description
24
7
25
6
26
5
27
4
28
3
29
2
ET4148-50
30
1
31
0
253
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