DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 845

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Register Name
Serial mode register_2
PWMX(D/A) data register AL
Bit rate register_2
Serial control register_2
Transmit data register_2
Serial status register_2
Receive data register_2
Smart card mode register_2
PWMX(D/A) counter H
PWMX(D/A) data register BH
PWMX(D/A) counter L
PWMX(D/A) data register BL
Timer control/status register_0
Timer control/status register_0
Timer counter _0
Timer counter _0
Port A output data register
Port A input data register
Port A data direction register
Port 1 pull-up MOS control register
Port 2 pull-up MOS control register
Port 3 pull-up MOS control register
Port 1 data direction register
RDR_2
DADRBH
TCNT_0
TCNT_0
PADDR
P1PCR
P2PCR
P3PCR
P1DDR
Abbreviation
SMR_2
DADRAL
BRR_2
SCR_2
TDR_2
SSR_2
SCMR_2
DACNTH
DACNTL
DADRBL
TCSR_0
TCSR_0
PAODR
PAPIN
Number
of bits
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
Address
H'FFA0
H'FFA1
(RELOCATE = 0)
H'FFA1
H'FFA2
H'FFA3
H'FFA4
H'FFA5
H'FFA6
H'FFA6
(RELOCATE = 0)
H'FFA6
(RELOCATE = 0)
H'FFA7
(RELOCATE = 0)
H'FFA7
(RELOCATE = 0)
H'FFA8 (Write)
H'FFA8 (Read)
H'FFA8 (Write)
H'FFA9 (Read)
H'FFAA
(PORTS = 0)
H'FFAB (Read)
(PORTS = 0)
H'FFAB (Write)
(PORTS = 0)
H'FFAC
(PORTS = 0)
H'FFAD
(PORTS = 0)
H'FFAE
(PORTS = 0)
H'FFB0
(PORTS = 0)
Rev. 3.00 Sep. 28, 2009 Page 799 of 910
Section 25 List of Registers
Module
SCI_2
PWMX
SCI_2
SCI_2
SCI_2
SCI_2
SCI_2
SCI_2
PWMX
PWMX
PWMX
PWMX
WDT_0
WDT_0
WDT_0
WDT_0
PORT
PORT
PORT
PORT
PORT
PORT
PORT
REJ09B0350-0300
Data
Width
8
8
8
8
8
8
8
8
8
8
8
8
16
8
16
8
8
8
8
8
8
8
8
Access
States
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2