DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 389

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit
4
3
2
1
0
Bit Name
TPDMXIE
ICPIE
CMIE
TDPIPE
TPDMNIE
Initial
Value R/W
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Cycle Upper Limit Overflow Interrupt Enable
Enables or disables the issuing of TPDMXOVF interrupt
requests when the TPDMXOVF flag in TDPCSR is set to 1.
0: TPDMXOVF interrupt requests are disabled
1: TPDMXOVF interrupt requests are enabled
Input Capture Interrupt Enable
Enables or disables the issuing of ICPF interrupt requests
when the ICPF flag in TDPCSR is set to 1.
0: ICPF interrupt requests are disabled
1: ICPF interrupt requests are enabled
Compare Match Interrupt Enable
Enables or disables the issuing of CMF interrupt requests
when the CMF flag in TDPCSR is set to 1.
0: CMF interrupt requests are disabled
1: CMF interrupt requests are enabled
Input Capture Input Enable
Enables or disables TDPCYI pin input.
To use input capture and cycle measurement mode, set this
bit to 1.
0: Disabled
1: Enabled
Note: Change this bit when CST = 0 and TDPMDS = 0.
Cycle Lower Limit Underflow Interrupt Enable
Enables or disables the issuing of TPDMNUDF interrupt
requests when the TPDMNUDF flag in TDPCSR is set to 1.
0: TPDMNUDF interrupt requests are disabled
1: TPDMNUDF interrupt requests are enabled
Section 12 16-Bit Duty Period Measurement Timer (TDP)
Rev. 3.00 Sep. 28, 2009 Page 343 of 910
REJ09B0350-0300