DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 513

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

This LSI has single-channel serial communication interface with FIFO buffers (SCIF) that
supports asynchronous serial communication.
The SCIF enables asynchronous serial communication with standard asynchronous
communication LSIs such as a Universal Asynchronous Receiver/Transmitter (UART). The SCIF
also has independent 16-stage FIFO buffers for transmission and reception to provide efficient
high-speed continuous communication.
In addition, the SCIF can be connected to the LPC interface for direct control from the LPC host.
16.1
• Full-duplex communication:
• On-chip baud rate generator allows any bit rate to be selected
• Modem control function
• Data length: Selectable from 5, 6, 7, and 8 bits
• Parity: Selectable from even parity, odd parity, and no parity
• Stop bit length: Selectable from 1, 1.5, and 2 bits
• Receive error detection: Parity, overrun, and framing errors
• Break detection
The transmitter and receiver are independent, enabling transmission and reception to be
executed simultaneously. Both the transmitter and receiver use 16-stage FIFO buffering,
enabling continuous transmission and continuous reception of serial data.
Section 16 Serial Communication Interface with FIFO
Features
(SCIF)
Section 16 Serial Communication Interface with FIFO (SCIF)
Rev. 3.00 Sep. 28, 2009 Page 467 of 910
REJ09B0350-0300