DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 119

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
3.2.4
SYSCR3 selects the register map and interrupt vector.
Note:
3.3
3.3.1
The CPU can access a 16-Mbyte address space in either advanced mode or single-chip mode. The
on-chip ROM is enabled.
Bit
7
6
5
4 to 0 —
* Switch the modes when an interrupt occurrence is disabled.
Bit Name
EIVS*
RELOCATE
System Control Register 3 (SYSCR3)
Operating Mode Descriptions
Mode 2
Initial
Value
0
1
1
All 0
R/W
R/W
R/W
R/W
R/W
Description
Reserved
The initial value should not be changed.
Extended interrupt Vector Select*
Selects compatible mode or extended mode for the
interrupt vector table.
0: H8S/2140B Group compatible vector mode
1: Extended vector mode
For details, see section 5, Interrupt Controller.
Register Address Map Select
Selects compatible mode or extended mode for the
register map.
When extended mode is selected for the register map,
CPU access for registers can be controlled without
using the KINWUE bit in SYSCR or the IICE bit in
STCR to switch the registers to be accessed.
0: H8S/2140B Group compatible register map mode
1: Extended register map mode
For details, see section 25, List of Registers.
Reserved
The initial value should not be changed.
Rev. 3.00 Sep. 28, 2009 Page 73 of 910
Section 3 MCU Operating Modes
REJ09B0350-0300

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