DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 674

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 LPC Interface (LPC)
19.3.15 SERIRQ Control Register 2 (SIRQCR2)
SIRQCR2 contains bits that enable or disable SERIRQ interrupt requests and select the host
interrupt request outputs.
Rev. 3.00 Sep. 28, 2009 Page 628 of 910
REJ09B0350-0300
Bit
7
6
Bit Name Initial Value Slave Host Description
IEDIR3
IEDIR4
0
0
R/W
R/W
R/W
⎯
⎯
Interrupt Enable Direct Mode 3
Selects whether an SERIRQ interrupt generation of
LPC channel 3 is affected only by a host interrupt
enable bit or by an OBF flag in addition to the enable
bit.
0: A host interrupt is generated when both the
1: A host interrupt is generated when the enable bit
Interrupt Enable Direct Mode 4
Selects whether an SERIRQ interrupt generation of
LPC channel 4 is affected only by a host interrupt
enable bit or by an OBF flag in addition to the enable
bit.
0: A host interrupt is generated when both the
1: A host interrupt is generated when the enable bit
enable bit and the corresponding OBF flag are
set
is set
enable bit and the corresponding OBF flag are
set
is set