DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 344

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 10 16-Bit Timer Pulse Unit (TPU)
10.8.3
If the counter clear signal is generated in the T
precedence and the TCNT write is not performed. Figure 10.44 shows the timing in this case.
10.8.4
If incrementing occurs in the T
and TCNT is not incremented. Figure 10.45 shows the timing in this case.
Rev. 3.00 Sep. 28, 2009 Page 298 of 910
REJ09B0350-0300
Conflict between TCNT Write and Clear Operations
Conflict between TCNT Write and Increment Operations
Figure 10.45 Conflict between TCNT Write and Increment Operations
φ
Address
Write signal
TCNT input
clock
TCNT
φ
Address
Write signal
Counter clear
signal
TCNT
Figure 10.44 Conflict between TCNT Write and Clear Operations
2
state of a TCNT write cycle, the TCNT write takes precedence
N
TCNT write data
TCNT write cycle
2
N
TCNT write cycle
state of a TCNT write cycle, TCNT clearing takes
TCNT address
TCNT address
T1
T1
T2
T2
M
H'0000

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