DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 422

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 13 8-Bit Timer (TMR)
13.5.2
The CMFA and CMFB flags in TCSR are set to 1 by a compare-match signal generated when the
TCNT and TCOR values match. The compare-match signal is generated at the last state in which
the match is true, just when the timer counter is updated. Therefore, when TCNT and TCOR
match, the compare-match signal is not generated until the next TCNT input clock. Figure 13.6
shows the timing of CMF flag setting.
13.5.3
When a compare-match signal occurs, the timer output changes as specified by the OS3 to OS0
bits in TCSR. Figure 13.7 shows the timing of timer output when the output is set to toggle by a
compare-match A signal.
Rev. 3.00 Sep. 28, 2009 Page 376 of 910
REJ09B0350-0300
φ
Compare-match A
signal
Timer output pin
Figure 13.7 Timing of Toggled Timer Output by Compare-Match A Signal
Timing of CMFA and CMFB Setting at Compare-Match
Timing of Timer Output at Compare-Match
φ
TCNT
TCOR
Compare-match
signal
CMF
Figure 13.6 Timing of CMF Setting at Compare-Match
N
N
N + 1