DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 548

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
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Quantity:
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Part Number:
DF2117VLP20V
Manufacturer:
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Quantity:
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Section 16 Serial Communication Interface with FIFO (SCIF)
16.5
Table 16.9 lists the interrupt sources. A common interrupt vector is assigned to each interrupt
source.
When the LPC uses the SCIF, the LPC does not request any interrupts to be sent to the H8S CPU.
The SERIRQ signal of the LPC interface transmits an interrupt request to the host.
Table 16.9 Interrupt Sources
Table 16.10 shows the interrupt source, vector address, and interrupt priority.
Table 16.10 Interrupt Source, Vector Address, and Interrupt Priority
16.6
16.6.1
To switch to watch mode or software standby mode when LCLK divided by 18 has been selected
for SCLK, use the shutdown function of the LPC interface to stop LCLK.
16.6.2
Set FLCR to its initial value and do not write to it during serial transmission or reception.
Rev. 3.00 Sep. 28, 2009 Page 502 of 910
REJ09B0350-0300
Interrupt Name
Receive line status
Receive data ready
Character timeout
(when FIFO is enabled)
FTHR empty
Modem status
Interrupt
Origin of Interrupt Source
SCIF
Interrupt Sources
Usage Note
Power-Down Mode When LCLK Is Selected for SCLK
FLCR Access During Serial Transmission and Reception
Interrupt Source
Overrun error, parity error, framing error, break interrupt
Acceptance of receive data, FIFO trigger level
No data is input to or output from the receive FIFO for the 4-
character time period while one or more characters remain in
the receive FIFO.
FTHR empty
CTS, DSR, RI, DCD
Interrupt Name
SCIF (SCIF interrupt)
Vector
Number
82
Vector
Address
H'000148
Priority
High
Low
ICR
ICRC7

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