DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 40

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.4 Operation in Asynchronous Mode ..................................................................................... 423
15.5 Multiprocessor Communication Function.......................................................................... 434
15.6 Operation in Clocked Synchronous Mode ......................................................................... 440
15.7 Smart Card Interface Description ...................................................................................... 448
15.8 Interrupt Sources................................................................................................................ 459
15.9 Usage Notes ....................................................................................................................... 461
Rev. 3.00 Sep. 28, 2009 Page xxxviii of xliv
REJ09B0350-0300
15.3.9 Bit Rate Register (BRR) ....................................................................................... 418
15.4.1 Data Transfer Format............................................................................................ 424
15.4.2 Receive Data Sampling Timing and Reception Margin in
15.4.3 Clock..................................................................................................................... 426
15.4.4 SCI Initialization (Asynchronous Mode).............................................................. 427
15.4.5 Serial Data Transmission (Asynchronous Mode) ................................................. 428
15.4.6 Serial Data Reception (Asynchronous Mode) ...................................................... 430
15.5.1 Multiprocessor Serial Data Transmission ............................................................. 436
15.5.2 Multiprocessor Serial Data Reception .................................................................. 437
15.6.1 Clock..................................................................................................................... 440
15.6.2 SCI Initialization (Clocked Synchronous Mode).................................................. 441
15.6.3 Serial Data Transmission (Clocked Synchronous Mode) ..................................... 442
15.6.4 Serial Data Reception (Clocked Synchronous Mode) .......................................... 444
15.6.5 Simultaneous Serial Data Transmission and Reception
15.7.1 Sample Connection ............................................................................................... 448
15.7.2 Data Format (Except in Block Transfer Mode) .................................................... 449
15.7.3 Block Transfer Mode ............................................................................................ 450
15.7.4 Receive Data Sampling Timing and Reception Margin ....................................... 451
15.7.5 Initialization.......................................................................................................... 452
15.7.6 Serial Data Transmission (Except in Block Transfer Mode) ................................ 452
15.7.7 Serial Data Reception (Except in Block Transfer Mode) ..................................... 455
15.7.8 Clock Output Control............................................................................................ 457
15.8.1 Interrupts in Normal Serial Communication Interface Mode ............................... 459
15.8.2 Interrupts in Smart Card Interface Mode .............................................................. 460
15.9.1 Module Stop Mode Setting ................................................................................... 461
15.9.2 Break Detection and Processing ........................................................................... 461
15.9.3 Mark State and Break Sending ............................................................................. 461
15.9.4 Receive Error Flags and Transmit Operations
15.9.5 Relation between Writing to TDR and TDRE Flag .............................................. 461
15.9.6 SCI Operations during Mode Transitions ............................................................. 462
15.9.7 Notes on Switching from SCK Pins to Port Pins .................................................. 465
Asynchronous Mode............................................................................................. 425
(Clocked Synchronous Mode) .............................................................................. 446
(Clocked Synchronous Mode Only) ..................................................................... 461