DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 682

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 LPC Interface (LPC)
In an I/O read cycle or I/O write cycle, transfer is carried out using LAD3 to LAD0 in the
following order, in synchronization with LCLK. The host can be made to wait by sending back a
value other than B'0000 in the slave's synchronization return cycle, but with the LPC of this LSI a
value of B'0000 always returns.
If the received address matches the host address in an LPC register (IDR, ODR, STR, and TWR),
the LPC interface enters the busy state; it returns to the idle state by output of a state count 12
turnaround. Register and flag changes are made at this timing, so in the event of a transfer cycle
forced termination (abort), registers and flags are not changed.
The timing of the LFRAME, LCLK, and LAD signals is shown in figures 19.2 and 19.3.
Table 19.3 LPC I/O Cycle
Rev. 3.00 Sep. 28, 2009 Page 636 of 910
REJ09B0350-0300
State
Count
1
2
3
4
5
6
7
8
9
10
11
12
13
Contents
Start
Cycle type/direction
Address 1
Address 2
Address 3
Address 4
Turnaround (recovery) Host
Turnaround
Synchronization
Data 1
Data 2
Turnaround (recovery) Slave
Turnaround
I/O Read Cycle
Drive
Source
Host
Host
Host
Host
Host
Host
None
Slave
Slave
Slave
None
1111
0000
1111
Value
(3 to 0)
0000
0000
Bits 15 to 12
Bits 11 to 8
Bits 7 to 4
Bits 3 to 0
ZZZZ
Bits 3 to 0
Bits 7 to 4
ZZZZ
Contents
Start
Cycle type/direction
Address 1
Address 2
Address 3
Address 4
Data 1
Data 2
Turnaround (recovery) Host
Synchronization
Turnaround (recovery) Slave
Turnaround
Turnaround
I/O Write Cycle
Drive
Source
Host
Host
Host
Host
Host
Host
Host
Host
Slave
None
None
Value
(3 to 0)
0000
0010
Bits 15 to 12
Bits 11 to 8
Bits 7 to 4
Bits 3 to 0
Bits 3 to 0
Bits 7 to 4
1111
ZZZZ
0000
1111
ZZZZ