DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 607

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 18 Keyboard Buffer Control Unit (PS2)
Section 18 Keyboard Buffer Control Unit (PS2)
This LSI has four on-chip keyboard buffer control unit (PS2) channels. The PS2 is provided with
functions conforming to the PS/2 interface specifications.
Data transfer using the PS2 employs a data line (KD) and a clock line (KCLK), providing
economical use of connectors, board surface area, etc. Figure 18.1 shows a block diagram of the
PS2.
18.1
Features
• Conforms to PS/2 interface specifications
• Direct bus drive (via the KCLK and KD pins)
• Interrupt sources: on completion of data reception/transmission, on detection of clock falling
edge, and on detection of the first falling edge of a clock
• Error detection: parity error, stop bit monitoring, and receive notify monitoring
Rev. 3.00 Sep. 28, 2009 Page 561 of 910
REJ09B0350-0300

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