DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 650

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 19 LPC Interface (LPC)
19.3.3
HICR4 enables/disables channel 4 and controls interrupts to the channel 4 of an LPC interface
slave (this LSI).
Rev. 3.00 Sep. 28, 2009 Page 604 of 910
REJ09B0350-0300
Bit
7
6
5
4 to 0 ⎯
Bit Name
LPC4E
IBFIE4
Host Interface Control Register 4 (HICR4)
Initial
Value
0
0
0
All 0
Slave Host Description
R/W
R/W
R/W
R/W
R/W
Reserved
The initial value bit should not be changed.
LPC Enable 4
0: LPC channel 4 is disabled
1: LPC channel 4 enabled
IDR4 Receive Completion Interrupt Enable
Enables or disables IBFI4 interrupt to the slave (this
LSI).
0: Input data register (IDR4) receive complete
1: Input data register (IDR4) receive complete
Reserved
The initial value should not be changed.
interrupt requests disabled
For IDR4, ODR4, and STR4, address (LADR4)
match is not occurred.
interrupt requests enabled

Related parts for DF2117VLP20V