DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 736

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 Flash Memory
(6)
FTDAR specifies the start address of the on-chip RAM at which to download an on-chip program.
FTDAR must be set before setting the SCO bit in FCCS to 1.
Rev. 3.00 Sep. 28, 2009 Page 690 of 910
REJ09B0350-0300
Bit
7
6
5
4
3
2
1
0
Flash Transfer Destination Address Register (FTDAR)
Bit Name
TDER
TDA6
TDA5
TDA4
TDA3
TDA2
TDA1
TDA0
Initial
Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Transfer Destination Address Setting Error
This bit is set to 1 when an error has occurred in setting
the start address specified by bits TDA6 to TDA0.
A start address error is determined by whether the value
set in bits TDA6 to TDA0 is within the range of H'00 to
H'01 when download is executed by setting the SCO bit
in FCCS to 1. Make sure that this bit is cleared to 0
before setting the SCO bit to 1 and the value specified
by bits TDA6 to TDA0 should be within the range of
H'00 to H'01.
0: The value specified by bits TDA6 to TDA0 is within
1: The value specified by bits TDA6 to TDA0 is between
Transfer Destination Address
Specifies the on-chip RAM start address of the
download destination. A value between H'00 and H'01,
and up to 3 kbytes can be specified as the start address
of the on-chip RAM.
H'00:
H'01:
H'02 to H'7F: Setting prohibited.
the range.
H'02 and H'FF and download has stopped.
H'FFD080 is specified as the start
address.
H'FFD880 is specified as the start
address.
(Specifying a value from H'02 to H'7F sets
the TDER bit to 1 and stops download of
the on-chip program.)