DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 537

• Manufacturer Part Number: DF2117VLP20V
• Description: IC H8S/2117 MCU FLASH 145TFLGA
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2117VLP20V

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: FIFO, I²C, LPC, SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 112
• Program Memory Size: 160KB (160K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 145-TFLGA
• For Use With: HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(2)
Figure 16.4 shows an example of the data transmission flowchart.
(End of transmission or transmission standby)
Serial Data Transmission
Clear BREAK bit in FLCR to 0
Write transmit data to FTHR
Set BREAK bit in FLCR to 1
Read THRE flag in FLSR
Read TEMT flag in FLSR
Break time completed
Start transmission
All data written
Break output
Initialization
THRE = 1?
TEMT = 1
Yes
Yes
Yes
Yes
Yes
Figure 16.4 Example of Data Transmission Flowchart
No
No
No
No
[1]
[2]
[3]
Section 16 Serial Communication Interface with FIFO (SCIF)
[1] Confirm that the THRE flag in FLSR is 1, and write transmit
[2] Read the TEMT flag in FLSR, and confirm that TEMT is set to
[3] To output a break at the end of serial transmission, set the
data to FTHR. When FIFOs are used, write 1-byte to 16-byte
transmit data. When the OUT2 bit in FMCR and the ETBEI bit
in FIER are set to 1, an FTHR empty interrupt occurs. When
data is written to FTHR, it is transferred automatically to FTSR.
The data is then transmitted from the FTxD pin in the order of
the start bit, transmit data, parity bit, and stop bit.
1 to ensure that all transmit data has been transmitted.
BREAK bit in FLCR to 1. After completion of the break time,
clear the BREAK bit in FLCR to 0 to clear the break.
Rev. 3.00 Sep. 28, 2009 Page 491 of 910
REJ09B0350-0300