DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 229

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
(7)
The pin function is switched as shown below according to the state of the PG1DDR bit. When the
PMMS bit in TDPCR2_1 of the TDP is set to 1, this pin is used as the TDPMCI1 input pin. When
the external clock is selected by the CKS2 to CKS0 bits in TDPCR1_1 of the TDP, this pin is used
as the TDPCKI1 input pin. Do not set input of TDPCKI1 and TDPMCI1 at the same time. When
the ISS9 bit in ISSR16 is set to 1 and the IRQ9E bit in IER16 of the interrupt controller is set to 1,
this pin can be used as the ExIRQ9 input pin.
Module
Name
I/O port
(8)
The pin function is switched as shown below according to the state of the PG0DDR bit. When the
TDPIPE bit in TDPIER_1 of the TDP is set to 1, this pin is used as the TDPCYI1 input pin. When
the ISS8 bit in ISSR16 is set to 1 and the IRQ8E bit in IER16 of the interrupt controller is set to 1,
this pin can be used as the ExIRQ8 input pin.
Module
Name
I/O port
PG1/ExIRQ9/TMIY/TDPCKI1/TDPMCI1
PG0/ExIRQ8/TMIX/TDPCYI1
Pin Function
PG1 output
PG1 input
(initial setting)
Pin Function
PG0 output
PG0 input
(initial setting)
Setting
I/O Port
PG1DDR
1
0
Setting
I/O Port
PG0DDR
1
0
Rev. 3.00 Sep. 28, 2009 Page 183 of 910
Section 7 I/O Ports
REJ09B0350-0300

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