DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 746

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 22 Flash Memory
(4)
FMPAR stores the start address of the programming destination on the user MAT.
When an address in an area other than the flash memory is set, or the start address of the
programming destination is not aligned with the 128-byte boundary, an error occurs. The error
occurrence is indicated by the WA bit in FPFR.
(5)
FMPDR stores the start address in the area which stores the data to be programmed in the user
MAT.
When the storage destination for the program data is in flash memory, an error occurs. The error
occurrence is indicated by the WD bit in FPFR.
Rev. 3.00 Sep. 28, 2009 Page 700 of 910
REJ09B0350-0300
Bit
31 to 0
Bit
31 to 0
Flash Multipurpose Address Area Parameter (FMPAR: General Register ER1 of CPU)
Flash Multipurpose Data Destination Parameter (FMPDR: General Register ER0 of
CPU)
Bit Name
MOA31 to
MOA0
Bit Name
MOD31 to
MOD0
Initial
Value
Initial
Value
R/W
R/W
R/W
R/W
Description
These bits store the start address of the programming
destination on the user MAT. Consecutive 128-byte
programming is executed starting from the specified
start address of the user MAT. Therefore, the specified
start address of the programming destination becomes a
128-byte boundary, and MOA6 to MOA0 are always
cleared to 0.
Description
These bits store the start address of the area which
stores the program data for the user MAT. Consecutive
128-byte data is programmed to the user MAT starting
from the specified start address.

Related parts for DF2117VLP20V