DF2117VLP20V Renesas Electronics America, DF2117VLP20V Datasheet - Page 722

IC H8S/2117 MCU FLASH 145TFLGA

DF2117VLP20V

Manufacturer Part Number
DF2117VLP20V
Description
IC H8S/2117 MCU FLASH 145TFLGA
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheet

Specifications of DF2117VLP20V

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
FIFO, I²C, LPC, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
112
Program Memory Size
160KB (160K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
145-TFLGA
For Use With
HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2117VLP20V
Manufacturer:
Renesas
Quantity:
100
Part Number:
DF2117VLP20V
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Section 22 Flash Memory
• Programming/erasing protection
22.2
When the mode pins are set in the reset state and reset start is performed, this LSI enters each
operating mode as shown in figure 22.2. Although the flash memory can be read in user mode, it
cannot be programmed or erased. The flash memory can be programmed or erased in boot mode,
user program mode, user boot mode, and programmer mode. The differences between boot mode,
user program mode, user boot mode, and programmer mode are shown in table 22.1.
Rev. 3.00 Sep. 28, 2009 Page 676 of 910
REJ09B0350-0300
Protection against programming/erasing of the flash memory can be set by hardware
protection, software protection, or error protection.
Mode Transition Diagram
[Legend]
FCCS:
FPCS:
FECS:
FKEY:
FMATS: Flash MAT select register
RAMER: Flash transfer destination address register
Note: To read/write the registers above, the FLSHE bit in the serial timer control register (STCR)
Mode pins
must be set to 1.
Flash code control/status register
Flash program code select register
Flash erase code select register
Flash key code register
Figure 22.1 Block Diagram of Flash Memory
FTDAR
FMATS
FCCS
FPCS
FECS
FKEY
Operating
mode
Internal data bus (16 bits)
Internal address bus
Control unit
Flash memory
User MAT: 160 kbytes
User boot MAT: 8 kbytes
Memory MAT unit

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