AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 3

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AM79C971VCW

Manufacturer Part Number
AM79C971VCW
Description
PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
Manufacturer
Advanced Micro Devices
Datasheet
In addition, the device provides programmable on-chip
LED drivers for transmit, receive, collision, receive po-
larity, link integrity, activity, link active, address match,
full-duplex, MII select, 100 Mbps, or jabber status. The
Am79C971 controller also provides an EADI to allow
external hardware address filtering in internetworking
applications and a receive frame tagging feature.
For power sensitive applications where low standby
current is desired, the device incorporates two sleep
functions to reduce overall system power consumption,
excellent for notebooks and green PCs. In conjunction
with these low power modes, the PCnet-FAST control-
ler also has integrated functions to support Magic
Packet technology, an inexpensive technology that al-
lows remote wake up of networked PCs.
The controller has the capability to automatically select
either the MII, AUI, or Twisted-Pair transceiver. Only
one interface is active at any one time. Any of the net-
work interfaces can be programmed to operate in either
half-duplex or full-duplex mode (AUI full-duplex only
supports the 10BASE-F standard).
The dual Transmit and Receive FIFOs optimize system
overhead, providing sufficient latency tolerance at 10
Mbps and for 100-Mbps systems where low latencies
Am79C971
can be guaranteed during frame transmission and
reception.
In highly loaded 10-Mbps systems, such as servers or
when using the controller in a 100-Mbps environment,
the additional frame buffering capability provided by a
16-bit wide SRAM interface provides high performance
and high latency tolerance on the system bus and net-
work.
The Am79C971 controller can use up to 128 Kbytes of
SRAM as an extension of its dual Transmit and Receive
FIFOs. When no SRAM is used, the Am79C971 con-
troller’s FIFOs are programmed to bypass the SRAM
interface.
IMPORTANT NOTE: A “No SRAM configuration” is only
valid for 10Mb mode. In 100Mb mode, SRAM is man-
datory and must always be used.
ISO/IEC 8802-3 and IEEE 802.3 will be used inter-
changeably when referring to half-duplex 10 Mbps net-
works. IEEE 802.3 or IEEE 802.3u will be used
interchangeably only when referring to half-duplex 100-
Mbps Ethernet networks, since the IEEE standard is
not ISO approved yet. Full-duplex is a proprietary stan-
dard and is not approved by IEEE or ISO.
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