AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 250

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

Register 4: Auto Negotiation
Advertisement Ability Register
Bit
15
14
13
12-5
4-0
E-4
Name
NP
RES
RF
TAF
SF
NA (0)
0
03
01
0
Description
Next Page. Defaults 0
to ZERO after power-
up and after hardware
resets
This bit indicates the
ability of the PHY to
send
message pages after
the initial base code
word has been sent.
The
controller does not
support Next Pages
currently.
Read
always.
Remote
Defaults
after power-up and
after hardware resets
(H_RESET). This bit
indicates
have
remote fault with the
other node.
Technology
Field.
Am79C971 controller
will
10BaseT or 10BaseT
full duplex with the
internal PHY device.
When
internal PHY the TAF
will
00000011b always.
Selector Field. The
Am79C971 controller
will
support IEEE 802.3
messages.
using
PHY the SF will be
set to 00001b always.
only
only
be
and
detected
the
(H_RESET).
as
using
Am79C971
to
that
set
currently
support
receive
internal
ZERO
ZERO
Ability
When
Fault.
The
the
Am79C971
we
to
a
Register 5: Auto Negotiation Link-Partner
Ability Register
Bit
These fields are identical to the previous and are valid
for the node in which we are currently engaged.
15
14
13
12-5
4-0
Register 6: Auto Negotiation Expansion
Register
Bit
This is the catch all register of odds and ends that did
not fit in other registers.
15-5
4
Name
NP
ACK
RF
TAF
SF
Name
RES
PDF
0
0
0
03
01
0
0
Description
Next Page. Defaults
to ZERO after power-
up and after hardware
resets (H_RESET).
Acknowledge.
Defaults
after power-up and
after hardware resets
(H_RESET).
Remote
Defaults
after power-up and
after hardware resets
(H_RESET)
Technology
Field. Defaults to all
ZEROs after power-
up and after hardware
resets (H_RESET)
Selector
Defaults to all ZEROs
after power-up and
after hardware resets
(H_RESET)
Description
Reserved. Read and
written as ZERO’s.
Parallel
Fault.
ZERO after power-up
and after hardware
resets
This bit indicates that
more than one PHY
has responded to a
valid link or none
have responded to a
valid link. Either way
Defaults
(H_RESET).
to
to
Detection
ZERO
ZERO
Ability
Fault.
Field.
to