AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 166

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

7
6
166
DWIO
BREADE
Double Word I/O. When set, this
bit indicates that the Am79C971
controller is programmed for
DWord I/O (DWIO) mode. When
cleared, this bit indicates that the
Am79C971 controller is pro-
grammed for Word I/O (WIO)
mode. This bit affects the I/O Re-
source Offset map and it affects
the
Am79C971 controllers I/O re-
sources. See the DWIO and WIO
sections for more details.
Burst Read Enable. When set,
this bit enables burst mode during
memory read accesses. When
cleared, this bit prevents the de-
EXTREQ should not be set to 1
when the Am79C971 controller is
used in a PCI bus application.
Read accessible always, write
accessible only when either the
STOP or the SPND bit is set. EX-
TREQ is cleared by H_RESET
and is not affected by S_RESET
or STOP.
The initial value of the DWIO bit is
determined by the programming
of the EEPROM.
The value of DWIO can be al-
tered
Am79C971 controller. Specifical-
ly, the Am79C971 controller will
set DWIO if it detects a DWord
write access to offset 10h from
the Am79C971 controller I/O
base address (corresponding to
the RDP resource).
Once the DWIO bit has been set
to a 1, only a H_RESET or an EE-
PROM read can reset it to a 0.
(Note that the EEPROM read op-
eration will only set DWIO to a 0 if
the appropriate bit inside of the
EEPROM is set to 0.)
Read accessible always. DWIO
is read only, write operations
have no effect. DWIO is cleared
by H_RESET and is not affected
S_RESET or by setting the STOP
bit.
defined
automatically
width
P R E L I M I N A R Y
by
of
the
the
Am79C971
5
4-3
2-0
BWRITE
TSTSHDW
LINBC
Reserved locations. Read acces-
vice from performing bursting
during
Am79C971 controller can per-
form burst transfers when reading
the initialization block, the de-
scriptor
SWSTYLE = 3) and the buffer
memory.
BREADE should be set to 1 when
the Am79C971 controller is used
in a PCI bus application to guar-
antee maximum performance.
Read accessible always; write
accessible only when either the
STOP or the SPND bit is set.
BREADE is cleared by H_RESET
and is not affected by S_RESET
or STOP.
Burst Write Enable. When set,
this bit enables burst mode during
memory write accesses. When
cleared, this bit prevents the de-
vice from performing bursting
during
Am79C971 controller can per-
form burst transfers when writing
the descriptor ring entries (when
SWSTYLE = 3) and the buffer
memory.
BWRITE should be set to 1 when
the Am79C971 controller is used
in a PCI bus application to guar-
antee maximum performance.
Read accessible always, write
accessible only when either the
STOP or the SPND bit is set.
BWRITE is cleared by H_RESET
and is not affected by S_RESET
or STOP.
Reserved locations. Written an
read as zeros.
sible always; write accessible
only when either the STOP or the
SPND bit is set. After H_RESET,
the value in these bits will be
001b. The setting of these bits
have no effect on any Am79C971
controller function. LINBC is not
affected by S_RESET or STOP.
write
read
ring
accesses.
accesses.
entries
(when
The
The