AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 100

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

Other Data Registers
Other data registers are the following:
1. Bypass Register (1 bit)
2. Device ID register (32 bits) (Table 17).
The contents of the Device ID register is the same as
the contents of CSR88.
NAND Tree Testing
The Am79C971 controller provides a NAND tree test
mode to allow checking connectivity to the device on a
printed circuit board. The NAND tree is built on all PCI
bus, MII, and LED signals.
NAND tree testing is enabled by asserting RST. The re-
sult of the NAND tree test can be observed on the INTA
pin. See Figure 55.
100
Bits 31-28
Bits 27-12
Bits 11-1
Bit 0
RST (pin143)
CLK (pin 145)
GNT (pin 147)
EECS (pin 136)
Table 17. Device ID Register
Version
Part Number (0010 0110 0010 0011)
Manufacturer ID. The 11 bit manufacturer ID
cod for AMD is 00000000001 in accordance
with JEDEC publication 106-A.
Always a logic 1
VDD
....
Figure 55. NAND Tree Circuitry
Am79C971
Am79C971
Core
Pin 143 (RST) is the first input to the NAND tree. Pin
145 (CLK) is the second input to the NAND tree, fol-
lowed by pin 147 (GNT). All other PCI bus, Expansion
Bus, MII, LED signals follow, counterclockwise, with pin
136 (EECS) being the last. Pins labeled NC, analog in-
terfaces, and all power supply pins are not part of the
NAND tree. Table 18 shows the complete list of pins
connected to the NAND tree.
RST must be asserted low to start a NAND tree test
sequence. Initially, all NAND tree inputs except RST
should be driven high. This will result in a high output
at the INTA pin. If the NAND tree inputs are driven from
high to low in the same order as they are connected to
build the NAND tree, INTA will toggle every time an ad-
ditional input is driven low. INTA will change to low,
when CLK is driven low and all other NAND tree inputs
stay high. INTA will toggle back to high, when GNT is
additionally driven low. The square wave will continue
until all NAND tree inputs are driven low. INTA will be
high, when all NAND tree inputs are driven low. See
Figure 56.
Note: Some of the pins connected to the NAND tree
are outputs in normal mode of operation. They must not
be driven from an external source until the Am79C971
controller is configured for NAND tree testing.
INTA
B
A
MUX
S
O
INTA (pin 142)
20550D-58