AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 154

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

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PSE
LNKSE
RCVME
XMTE
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
when the T-MAU mode is in Link
Pass state. When the T-MAU is in
Link Fail state, a value of 0 is
passed to the LEDOUT bit. This
bit does not reflect the link status
of the external PHY.
Receive Match Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast and promiscuous.
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
Read/Write accessible always.
PSE is set to 1 by H_RESET and
is not affected by S_RESET or
setting the STOP bit.
The function of this bit is masked
if the 10BASE-T port is operating
in full-duplex mode. This allows a
Half-Duplex Link Status LED and
a Full-Duplex Link Status LED at
the same time.
Read/Write accessible always.
LNKSE is set to 1 by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Read/Write accessible always.
RCVME is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
P R E L I M I N A R Y
Am79C971
3
2
1
0
RXPOLE
RCVE
JABE
COLE
Read/Write accessible always.
XMTE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Receive Polarity Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when the polarity of the
RXD
versed.
Receive polarity indication is val-
id only if the T-MAU is in link pass
state.
Read/Write accessible always.
RXPOLE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Receive Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
Read/Write accessible always.
RCVE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Jabber Status Enable. When this
bit is set, a value of 1 is passed to
the LEDOUT bit in this register
when the Am79C971 controller is
jabbering on the network.
Read/Write accessible always.
JABE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network. The activ-
ity on the collision inputs to the
AUI ports within the first 4 s after
every transmission for the pur-
pose of SQE testing will not
cause the LEDOUT bit to be set.
Read/Write accessible always.
COLE is cleared by H_RESET
and is not affected by S_RESET
or setting the STOP bit.
pair has not been re-