AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 209

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

SWITCHING CHARACTERISTICS: GENERAL-PURPOSE SERIAL INTERFACE
Notes:
1. CLSN must be asserted for a continuous period of 110 ns or more. Assertion for less than 110 ns period may or may not result
2. RXCLK should meet jitter requirements of IEEE 802.3 specification.
3. CLSN assertion before 51.2 s will be indicated as a normal collision. CLSN assertion after 51.2 s will be considered as a
Parameter
Symbol
Transmit Timing
t
t
t
t
t
t
t
t
t
Receive Timing
t
t
t
t
t
t
t
t
t
t
t
t
GPT1
GPT2
GPT3
GPT4
GPT5
GPT6
GPT7
GPT8
GPT9
GPR1
GPR2
GPR3
GPR4
GPR5
GPR6
GPR7
GPR8
GPR9
GPR10
GPR11
GPR12
in CLSN recognition.
Late Receive Collision.
Parameter Name
TXCLK Period (802.3 compliant)
TXCLK HIGH Time
TXDAT and TXEN Delay from
TXCLK
RXEN Setup before
Bit)
RXEN Hold after
CLSN Active Time to Trigger
Collision
CLSN Active to
LCAR Assertion
CLSN Active to
Heartbeat window
CLSN Active to
Collision
RXCLK Period
RXCLK HIGH Time
RXCLK LOW Time
RXDAT and RXEN Setup to
RXCLK
RXDAT Hold after
RXEN Hold after
CLSN Active to First
(Collision Recognition)
CLSN Active to
Address Type Designation Bit
CLSN Setup to Last
Collision Recognition
CLSN Active
CLSN Inactive Setup to First
RXCLK
CLSN Inactive Hold to Last
RXEN to Prevent
RXEN for SQE
RXEN for Normal
RXCLK for
TXEN
RXCLK
RXCLK
TXCLK (Last
RXCLK for
RXCLK
RXCLK @ 1.5 V
Test Condition
@ 1.5 V
@ 2.0 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V (Note 1)
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V (Note 2)
@ 2.0 V (Note 2)
@ 0.8 V (Note 2)
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V
@ 1.5 V (Note 3)
@ 1.5 V
@ 1.5 V
@ 1.5 V
Am79C971
Min
99.99
40
0
210
0
410
0
0
0
80
30
30
15
15
0
0
51.2
210
410
300
300
Max
100.01
60
70
4.0
51.2
120
80
80
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
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