AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 112

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

4-2
1
0
PCI Memory Mapped I/O Base Address Register
Offset 14h
The PCI Memory Mapped I/O Base Address register is
a 32-bit register that determines the location of the
Am79C971 I/O resources in all of memory space. It is
located at offset 14h in the PCI Configuration Space.
Bit
31-5
112
IOSIZE
RES
IOSPACE
Name
MEMBASE Memory mapped I/O base ad-
all of I/O space. IOBASE must be
written with a valid address be-
fore the Am79C971 controller
slave I/O mode is turned on by
setting the IOEN bit (PCI Com-
mand register, bit 0).
When the Am79C971 controller
is enabled for I/O mode (IOEN is
set), it monitors the PCI bus for a
valid I/O command. If the value
on AD[31:5] during the address
phase of the cycles matches the
value of IOBASE, the Am79C971
controller will drive DEVSEL indi-
cating it will respond to the ac-
cess.
IOBASE is read and written by
the host. IOBASE is cleared by
H_RESET and is not affected by
S_RESET or by setting the STOP
bit.
zeros; write operations have no
effect.
IOSIZE indicates the size of the
I/O space the Am79C971 control-
ler requires. When the host writes
a value of FFFF FFFFh to the I/O
Base Address register, it will read
back a value of 0 in bits 4-2. That
indicates
space requirement of 32 bytes.
write operations have no effect.
write operations have no effect.
Indicating that this base address
register describes an I/O base
address.
dress most significant 27 bits.
These bits are written by the host
to specify the location of the
I/O size requirements. Read as
Reserved location. Read as zero;
I/O space indicator. Read as one;
Description
an
Am79C971
Am79C971
I/O
4
3
2-1
PREFETCH Prefetchable. Read as zero; write
MEMSIZE
TYPE
When the Am79C971 controller
is enabled for memory mapped
I/O mode (MEMEN is set), it mon-
itors the PCI bus for a valid mem-
ory command. If the value on
AD[31:5] during the address
phase of the cycles matches the
value
Am79C971 controller will drive
DEVSEL indicating it will respond
to the access.
MEMBASE is read and written by
the host. MEMBASE is cleared
by H_RESET and is not affected
by S_RESET or by setting the
STOP bit.
MEMSIZE indicates the size of
the
Am79C971 controller requires.
When the host writes a value of
FFFF FFFFh to the Memory
Mapped I/O Base Address regis-
ter, it will read back a value of 0 in
bit 4. That indicates a Am79C971
memory space requirement of 32
bytes.
Am79C971 I/O resources in all of
memory space. MEMBASE must
be written with a valid address
before the Am79C971 controller
slave memory mapped I/O mode
is turned on by setting the ME-
MEN bit (PCI Command register,
bit 1).
quirements. Read as zeros; write
operations have no effect.
operations have no effect. Indi-
cates that memory space con-
trolled by this base address
register is not prefetchable. Data
in the memory mapped I/O space
cannot be prefetched. Because
one of the I/O resources in this
address space is a Reset regis-
ter, the order of the read access-
es is important.
zeros; write operations have no
effect. Indicates that this base ad-
dress register is 32 bits wide and
Memory mapped I/O size re-
Memory type indicator. Read as
memory
of
MEMBASE,
space
the
the