AM79C971VCW Advanced Micro Devices, AM79C971VCW Datasheet - Page 125

• Manufacturer Part Number: AM79C971VCW
• Description: PCnet-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus
• Manufacturer: Advanced Micro Devices

2
1
0
MPEN
MPMODE
SPND
lows activation of the Magic
Packet mode by the host. The
Am79C971 controller will enter
the Magic Packet mode when
both MPEN and MPMODE are
set to 1.
Read/Write accessible always.
MPEN
H_RESET or S_RESET and is
not affected by setting the STOP
bit.
MODE to 1 will redefine the
SLEEP pin to be a Magic Packet
enable pin. The Am79C971 con-
troller will enter the Magic Packet
mode when MPMODE is set to 1
and either SLEEP is asserted or
MPEN is set to 1.
Read/Write accessible always.
MPMODE is cleared to 0 by
H_RESET or S_RESET and is
not affected by setting the STOP
bit
cause the Am79C971 controller
to start requesting entrance into
suspend mode. The host must
poll SPND until it reads back 1 to
determine that the Am79C971
controller has entered the sus-
pend mode. Setting SPND to 0
will get the Am79C971 controller
out of suspend mode. SPND can
only be set to 1 if STOP (CSR0,
bit 2) is set to 0. H_RESET,
S_RESET or setting the STOP bit
will get the Am79C971 controller
out of suspend mode.
Requesting entrance into the
suspend mode by the host de-
pends on the setting of the
FASTSPNDE bit (CSR7, bit 15).
Refer to the bit description of the
FASTSPNDE bit and the Sus-
pend section in Detailed Func-
tions, Buffer Management Unit
for details.
In suspend mode, all of the CSR
and BCR registers are accessi-
ble. As long as the Am79C971
controller is not reset while in
Magic Packet Enable. MPEN al-
Magic Packet Mode. Setting MP-
Suspend. Setting SPND to 1 will
is
cleared
to
0
Am79C971
by
CSR6: RX/TX Descriptor Table Length
Bit
31-16 RES
15-12 TLEN
11-8
7-0
Name
RLEN
RES
suspend mode (by H_RESET,
S_RESET or by setting the STOP
bit), no re-initialization of the de-
vice is required after the device
comes out of suspend mode. The
Am79C971 controller will contin-
ue at the transmit and receive de-
scriptor
where it had left, when it entered
the suspend mode.
Read/Write accessible always.
SPND is cleared by H_RESET,
S_RESET, or by setting the
STOP bit.
Read accessible only when either
the STOP or the SPND bit is set.
Write operations have no effect
and should not be performed.
TLEN is only defined after initial-
ization. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Read accessible only when either
the STOP or the SPND bit is set.
Write operations have no effect
and should not be performed.
RLEN is only defined after initial-
ization. These bits are unaffected
by H_RESET, S_RESET, or
STOP.
Description
zeros and read as undefined.
encoded ring length (TLEN) field
read from the initialization block
during the Am79C971 controller
initialization. This field is written
during the Am79C971 controller
initialization routine.
encoded ring length (RLEN) read
from the initialization block during
Am79C971 controller initializa-
tion. This field is written during
the Am79C971 controller initial-
ization routine.
Write operations are ignored.
Reserved locations. Written as
Contains a copy of the transmit
Contains a copy of the receive
Reserved locations. Read as 0s.
ring
locations,
from
125