IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 85

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 4: Using MegaCore Functions
MegaCore Functions Design Issues
Figure 4–10. Generated HDL for mc_example Simulated in ModelSim Simulator
Note to
(1) This waveform display format shows the input and output signals as analog waveforms.
MegaCore Functions Design Issues
Simulink Files Associated with a MegaCore Function
© June 2010 Altera Corporation
Figure
4–10:
12. Click Zoom Full on the right button right button pop-up menu in the ModelSim
The ModelSim simulator now displays the input and output waveforms in analog
format
1. Click Compare Results in the Testbench Generator dialog box to compare the
2. Click OK to close the Testbench Generator dialog box.
This section describes some of the design issues to consider when using MegaCore
functions in a DSP Builder design.
DSP Builder stores the files that support the configuration and simulation of a
MegaCore function variation in a subdirectory of the directory containing your
Simulink MDL file DSPBuilder_<design name>_import. When copying a design from
one location to another, make sure that you also copy this subdirectory.
Wave window.
simulink results with the ModelSim-generated results. The message Exact
Match indicates that the results are identical.
(Figure
4–10).
Preliminary
DSP Builder Standard Blockset User Guide
4–13