IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 39
IPT-DSPBUILDER
Manufacturer Part Number
IPT-DSPBUILDER
Description
DSP BUILDER SOFTWARE
Manufacturer
Altera
Type
DSPr
Datasheet
1.IPT-DSPBUILDER.pdf
(422 pages)
Specifications of IPT-DSPBUILDER
Function
DSP Builder
License
Initial License
Software Application
IP CORE, DSP BUILDER
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
Not applicable / Not applicable
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Chapter 2: Getting Started
Performing RTL Simulation
Performing RTL Simulation
© June 2010 Altera Corporation
Figure 2–10. Signal Compiler Block Dialog Box
5. When the compilation completes successfully, click OK.
6. Click Save on the File menu to save your model.
To perform RTL simulation with the ModelSim software, add a TestBench block, by
following these steps:
1. Select the AltLab library from the Altera DSP Builder BlockSet folder in the
2. Drag and drop a TestBench block into your model.
3. Double-click on the new TestBench block.
Simulink Library Browser.
The Testbench Generator dialog box appears
Preliminary
(Figure
DSP Builder Standard Blockset User Guide
2–11).
2–17
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