IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 118

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

7–10
Figure 7–7. topavalon.mdl Design Example
DSP Builder Standard Blockset User Guide
10. Connect the ports
11. Drag and drop another Avalon-MM Slave block into the top right of your model
12. Double-click on the Avalon_MM_Read_Slave block to bring up the Block
13. Select Read for the address type, Signed Integer for the data type, and specify
14. Click OK and notice that the Avalon_MM_Read_Slave block redraws with three
15. Complete your design by connecting the Avalon_MM_Read_Slave ports
1
and change the name of this block instance to Avalon_MM_Read_Slave.
Parameters dialog box.
8 bits for the data width.
ports: Address i1:0, Read ibit, and Read Data o7:0.
(Figure
f
You can re-size a block by dragging the resize handles at each corner.
7–7).
The default design example uses the Stratix II EP2S60 DSP Development
Board. If you have a different board (such as the Cyclone II EP2C35
Development Board), you must replace the board block and
analog-to-digital converter blocks by corresponding blocks for the
appropriate board. For more information, refer to the Boards Library
chapter in the
the DSP Builder Handbook.
(Figure
DSP Builder Standard Blockset Libraries
Preliminary
7–7).
Avalon-MM Interface Blocks Design Example
Chapter 7: Using the Interfaces Library
© June 2010 Altera Corporation
section in volume 2 of