IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 75

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 4: Using MegaCore Functions
MegaCore Function Design Example
Parameterizing the MegaCore Function Variation
Generating the MegaCore Function Variation
Connecting the MegaCore Function Variation Block to the Design
Simulating the MegaCore Function Variation in the Model
MegaCore Function Design Example
Creating a New Simulink Model
© June 2010 Altera Corporation
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Double-click the MegaCore function block to open the IP Toolbench or MegaWizard
interface.
You can also double-click on a block to re-open and modify a previously
parameterized MegaCore function variation.
Before you can connect the block to your design, generate a MegaCore function
variation after you have parameterized the MegaCore function.
Click Generate in IP Toolbench (or Finish in the MegaWizard interface) to generate
the necessary files for your MegaCore function variation.
DSP Builder also performs an additional step of optimizing your model for use in
Simulink.
The Simulink block now has the required input and output ports as parameterized in
IP Toolbench or the MegaWizard interface. You can connect these ports to other Altera
DSP Builder blocks in your Simulink design.
You can simulate the Simulink block representing the MegaCore function variation
like any other block from the Simulink Library Browser.
Ensure that the Simulink simulation engine is set to use the discrete solver by
selecting fixed-step type under Solver Options in the Configuration Parameters
dialog box.
You should reset the MegaCore function at the start of the simulation to avoid any
functional discrepancy between RTL simulation and Simulink simulation
Initial Conditions” on page
This tutorial shows how to create a custom low-pass FIR filter MegaCore function
variation using the IP Toolbench interface.
This tutorial assumes that your PC has the Altera MegaCore IP Library.
To create a new Simulink workspace, follow these steps:
1. Start the MATLAB or Simulink software.
2. On the File menu, point to New and click Model to create a new model window.
3. Click Save on the File menu in the new model window.
3–17).
Preliminary
DSP Builder Standard Blockset User Guide
(“Startup &
4–3