IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 101

DSP BUILDER SOFTWARE

IPT-DSPBUILDER

Manufacturer Part Number
IPT-DSPBUILDER
Description
DSP BUILDER SOFTWARE
Manufacturer
Altera
Type
DSPr
Datasheet

Specifications of IPT-DSPBUILDER

Function
DSP Builder
License
Initial License
Software Application
IP CORE, DSP BUILDER
Core Architecture
FPGA
Core Sub-architecture
Arria, Cyclone, Stratix
Supported Families
Arria GX, Arria II GX, Cyclone, Stratix
Rohs Compliant
NA
Lead Free Status / RoHS Status
Not applicable / Not applicable
Chapter 6: Performing SignalTap II Logic Analysis
SignalTap II Example Designs
Opening the Design Example
Adding the Configuration and Connector Blocks
© June 2010 Altera Corporation
Figure 6–1. SignalTap II Design Example Directory Structure
You can start from the design in the original_design directory.
Alternatively, you can use the design in the completed_walkthrough directory and
go directly to
Open the template switch_control.mdl design in the <DSP Builder install path>\
DesignExamples\Tutorials\SignalTap\professional\original_design directory.
(Figure
Figure 6–2. Starting Point for the SignalTap II Design Example
You must add the board configuration block and connector blocks for the board that
you want to use. This tutorial uses the Cyclone II EP2C35 development board.
6–2).
“Turning On the SignalTap II Option in Signal Compiler” on page
Preliminary
DSP Builder Standard Blockset User Guide
6–6.
6–3

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