IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 419

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

SOP Tap block
SOPC Builder
SOPC builder
Square Root block
State machine
State Machine Editor
State Machine Editor block
State Machine Functions library
State Machine table
State Machine Table block
Storage library
Stratix EP1S25 DSP board
Stratix EP1S80 DSP board
Stratix II EP2S180 DSP board
Stratix II EP2S60 DSP board
Stratix II EP2S90GX PCI Express board
Stratix III EP3SL150 DSP board
Subsystem Builder
Subsystem Builder block
Sum of Products block
Sum of Products Tap block
T
TestBench
© June 2010 Altera Corporation
Interfaces library
Support
Instantiating your design
Implementing
Walkthrough
Walkthrough
Walkthrough
1–2
2–33
9–1
11–7
11–2
8–6
2–35
11–1
7–1
2–36
1–15
11–11
11–13
10–3
10–1
2–33
11–14
11–15
7–12
11–18
10–1
11–17
Preliminary
TestBench block
True Dual-Port RAM block
Tsamp block
Tutorial
Typographic Conventions
U
Up Sampling block
V
VCC block
VCD Sink block
W
Walkthrough
Warning message
Adding to a model
Getting started
Avalon-MM FIFO
Avalon-MM interface blocks
Black box
Custom library
Hardware in the loop
MegaCore function
SignalTap II
State Machine Editor
State Machine Table
I/O blocks conflict with clock or aclr ports
DSP Builder Handbook Volume 2: DSP Builder Standard Blockset
HDL import
Subsystem Builder
6–21
7–4
1–18
1–17
6–2
2–4
9–28
9–1
8–1
7–16
2–17
4–3
11–2
11–7
5–3
Info–1
8–6
9–24
7–8
Index–5
13–6