IPT-DSPBUILDER Altera, IPT-DSPBUILDER Datasheet - Page 229

• Manufacturer Part Number: IPT-DSPBUILDER
• Description: DSP BUILDER SOFTWARE
• Manufacturer: Altera
• Type: DSPr

Specifications of IPT-DSPBUILDER

• Function: DSP Builder
• License: Initial License
• Software Application: IP CORE, DSP BUILDER
• Core Architecture: FPGA
• Core Sub-architecture: Arria, Cyclone, Stratix
• Supported Families: Arria GX, Arria II GX, Cyclone, Stratix
• Rohs Compliant: NA
• Lead Free Status / RoHS Status: Not applicable / Not applicable

Chapter 2: Arithmetic Library
Multiplier
Table 2–31. Magnitude Block I/O Formats (Part 2 of 2)
Figure 2–13. Magnitude Block Example
Multiplier
© June 2010 Altera Corporation
O
Notes to
(1) For signed integers and signed binary fractional numbers, the MSB is the sign bit.
(2) [L] is the number of bits on the left side of the binary point; [R] is the number of bits on the right side of the binary point. For signed or unsigned
(3) I1
(4) Explicit means that the port bit width information is a block parameter. Implicit means that the port bit width information is set by the datapath
I/O
integers R = 0, that is, [L].[0]. For single bits, R = 0, that is, [1] is a single bit.
bit width propagation mechanism. To specify the bus format of an implicit input port, use a Bus Conversion block to set the width.
O1
[L].[R]
[L1].[R1]
Table
Simulink (2),
is an input port. O1
2–31:
(3)
Figure 2–13
The Multiplier block supports two scalar inputs (no multidimensional Simulink
signals). Operand a is multiplied by operand b and the result r output as the following
equation shows:
The differences between the Multiplier block and the
■
■
■
Table 2–32
Table 2–32. Multiplier Block Inputs and Outputs
a
b
ena
aclr
r
[L].[R]
r = a × b
The Product block supports clock phase selection while the Multiplier block
does not.
The Product block uses implicit input port data widths that it inherits from the
signals’ sources, whereas the Multiplier block uses explicit input port data
widths that you must specify as parameters.
The Product block allows you to use the LPM multiplier megafunction, whereas
the Multiplier block always uses the LPM.
Signal
O1: out STD_LOGIC_VECTOR({L1 + R1 - 1} DOWNTO 0)
is an output port.
shows the Multiplier block inputs and outputs.
shows an example with the Magnitude block.
Input
Input
Input
Input
Output
Direction
Preliminary
(Note 1)
Operand a.
Operand b.
Optional clock enable.
Optional asynchronous clear.
Result r.
VHDL
Description
Product
DSP Builder Standard Blockset Libraries
block are:
Implicit
Type
(4)
2–21