MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 67

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

2.3.2 PLL and Clock Signals
Table 2-3
2.3.3 Mode Selection
Table 2-4
2.3.4 External Memory Interface Signals
Table 2-5
Freescale Semiconductor
Reset In
Reset Out
External Clock In
Crystal
Clock Out
Clock Mode Selection
Reset Configuration
Signal Name
Signal Name
Signal Name
describes signals that are used to support the on-chip clock generation circuitry.
describes signals used in mode selection.
describes signals that are used for doing transactions on the external bus.
RESET
RSTOUT
Abbreviation
EXTAL
XTAL
CLKOUT
Abbreviation
CLKMOD[1:0] Configure the clock mode after reset.
RCON
Abbreviation
Table 2-4. Mode Selection Signals
Table 2-3. PLL and Clock Signals
MCF5235 Reference Manual, Rev. 2
Primary reset input to the device. Asserting RESET immediately
resets the CPU and peripherals.
Driven low for 128 CPU clocks when the soft reset bit of the system
configuration register (SCR[SOFTRST]) is set. It is driven low for 32K
CPU clocks when the software watchdog timer times out or when a
low input level is applied to RESET.
Always driven by an external clock input except when used as a
connection to the external crystal when the internal oscillator circuit is
used. The clock source is configured during reset by CLKMOD[1:0].
Used as a connection to the external crystal when the internal
oscillator circuit is used to drive the crystal.
This output signal reflects one-half the internal system clock. (f
Indicates whether the external D[31:16] pin states affect chip
configuration at reset.
Table 2-2. Reset Signals
Function
Function
Function
Signal Primary Functions
sys/2
)
I/O
I/O
I/O
O
O
O
I
I
I
I
2-9