MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 308

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

Edge Port Module (EPORT)
15.4.1.2 EPORT Data Direction Register (EPDDR)
15-4
Address
Reset
15–2
Bits
Bits
1–0
7–1
0
W
R
15
0
EPDD7
EPDDn
EPPAn
Name
Name
14
0
—
—
Figure 15-3. EPORT Data Direction Register (EPDDR)
13
0
EPDD6
EPORT pin assignment select fields. The read/write EPPAn fields configure EPORT pins
for level detection and rising and/or falling edge detection.
Pins configured as level-sensitive are inverted so that a logic 0 on the external pin
represents a valid interrupt request. Level-sensitive interrupt inputs are not latched. To
guarantee that a level-sensitive interrupt request is acknowledged, the interrupt source
must keep the signal asserted until acknowledged by software. Level sensitivity must be
selected to bring the device out of stop mode with an IRQn interrupt.
Pins configured as edge-triggered are latched and need not remain asserted for interrupt
generation. A pin configured for edge detection can trigger an interrupt regardless of its
configuration as input or output.
Interrupt requests generated in the EPORT module can be masked by the interrupt
controller module. EPPAR functionality is independent of the selected pin direction.
Reset clears the EPPAn fields.
00 Pin IRQn level-sensitive
01 Pin IRQn rising edge triggered
10 Pin IRQn falling edge triggered
11 Pin IRQn both falling edge and rising edge triggered
Reserved, should be cleared.
Setting any bit in the EPDDR configures the corresponding pin as an output. Clearing any
bit in EPDDR configures the corresponding pin as an input. Pin direction is independent of
the level/edge detection configuration. Reset clears EPDD7–EPDD1.
To use an EPORT pin as an external interrupt request source, its corresponding bit in
EPDDR must be clear. Software can generate interrupt requests by programming the
EPORT data register when the EPDDR selects output.
0 Corresponding EPORT pin configured as input
1 Corresponding EPORT pin configured as output
Reserved, should be cleared.
12
Table 15-3. EPPAR Field Descriptions
0
Table 15-4. EPDD Field Descriptions
11
0
EPDD5
MCF5235 Reference Manual, Rev. 2
10
0
IPSBAR + 0x13_0002
0
9
EPDD4
0
8
Description
Description
0
7
EPDD3
6
0
0
5
EPDD2
0
4
0
3
EPDD1
Freescale Semiconductor
0
2
0
0
1
0
0
0