MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 272

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

Interrupt Controller Modules
13-8
Address
Reset
Reset
31–0
Bits
W
W
R
R
31
15
1
1
If an interrupt source is being masked in the interrupt controller mask
register (IMR) or a module’s interrupt mask register while the
interrupt mask in the status register (SR[I]) is set to a value lower than
the interrupt’s level, a spurious interrupt may occur. This is because by
the time the status register acknowledges this interrupt, the interrupt
has been masked. A spurious interrupt is generated because the CPU
cannot determine the interrupt source. To avoid this situation for
interrupts sources with levels 1-6, first write a higher level interrupt
mask to the status register, before setting the mask in the IMR or the
module’s interrupt mask register. After the mask is set, return the
interrupt mask in the status register to its previous value. Since level 7
interrupts cannot be disabled in the status register prior to masking,
use of the IMR or module interrupt mask registers to disable level 7
interrupts is not recommended.
INT_MASK Interrupt mask. Each bit corresponds to an interrupt source. The corresponding IMRHn bit
Name
30
14
1
1
Figure 13-3. Interrupt Mask Register High (IMRHn)
29
13
1
1
determines whether an interrupt condition can generate an interrupt. The corresponding
IPRHn bit reflects the state of the interrupt signal even if the corresponding IMRHn bit is
set.
0 The corresponding interrupt source is not masked
1 The corresponding interrupt source is masked
28
12
1
1
IPSBAR + 0x00_0C08 (INTC0), IPSBAR + 0x00_D08 (INTC1)
Table 13-6. IMRHn Field Descriptions
27
11
1
1
MCF5235 Reference Manual, Rev. 2
26
10
1
1
25
1
1
9
NOTE
INT_MASK
INT_MASK
24
1
1
8
23
Description
1
1
7
22
1
6
1
21
1
1
5
20
1
1
4
19
1
1
3
Freescale Semiconductor
18
1
1
2
17
1
1
1
16
1
1
0