MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 24

• Manufacturer Part Number: MOD5234-100IR
• Description: MOD5234 10/100 ETHERNET MODULE
• Manufacturer: NetBurner Inc
• Type: Controllers & Processorsr

Specifications of MOD5234-100IR

• Interface: I²C, SPI, UART
• Voltage - Supply: 2.5V
• Mounting Type: Surface Mount
• Package / Case: Module
• Product: Modules
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Format: -
• Baud Rates: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: Q4483564

28.1
28.1.1
28.1.2
28.1.3
28.2
28.2.1
28.2.1.1
28.2.2
28.2.3
28.2.4
28.2.5
28.2.6
28.2.7
28.2.8
28.2.9
28.2.10
28.3
28.3.1
28.3.2
28.3.3
28.3.3.1
28.3.3.2
28.3.3.3
28.3.3.4
28.3.3.5
28.3.3.6
28.4
28.4.1
28.4.2
28.4.2.1
28.4.2.2
28.4.2.3
28.4.3
28.4.4
28.4.5
xxiv
Paragraph
Number
Introduction ................................................................................................................... 28-1
Memory Map/Register Definition ................................................................................ 28-3
Functional Description ................................................................................................ 28-13
Initialization/Application Information ........................................................................ 28-15
Overview ................................................................................................................... 28-1
Features ..................................................................................................................... 28-1
Modes of Operation .................................................................................................. 28-3
MDHA Mode Register (MDMR) ............................................................................. 28-4
MDHA Control Register (MDCR) ........................................................................... 28-7
MDHA Command Register (MDCMR) ................................................................... 28-7
MDHA Status Register (MDSR) .............................................................................. 28-8
MDHA Interrupt Status & Mask Registers (MDISR and MDIMR) ...................... 28-10
MDHA Data Size Register (MDDSR) .................................................................... 28-11
MDHA Input FIFO (MDIN) ................................................................................... 28-12
MDHA Message Digest Registers 0 (MD
MDHA Message Data Size Register (MDMDS) .................................................... 28-12
MDHA Message Digest Registers 1 (MD
MDHA Top Control ................................................................................................ 28-14
FIFO ........................................................................................................................ 28-14
MDHA Logic .......................................................................................................... 28-14
Performing a Standard HASH Operation ............................................................... 28-15
Performing a HMAC Operation Without the MACFULL Bit ............................... 28-15
Performing a SHA-1 EHMAC ................................................................................ 28-17
Performing a MAC Operation With the MACFULL Bit ....................................... 28-18
Performing an NMAC ............................................................................................ 28-19
Invalid Modes ....................................................................................................... 28-6
Address Decoder ................................................................................................. 28-14
Interface Control ................................................................................................. 28-14
Auto-Padder ........................................................................................................ 28-14
Hashing Engine ................................................................................................... 28-14
Hashing Engine Control ..................................................................................... 28-15
Status Interrupt .................................................................................................... 28-15
Generation of Key with IPAD ............................................................................ 28-16
Generation of Key with OPAD ........................................................................... 28-16
HMAC Hash ....................................................................................................... 28-17
Message Digest Hardware Accelerator (MDHA)
MCF5235 Reference Manual, Rev. 2
Contents
Chapter 28
Title
x
x
0) ......................................................... 28-12
1) ......................................................... 28-13
Freescale Semiconductor
Number
Page