MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 360

MOD5234 10/100 ETHERNET MODULE

MOD5234-100IR

Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr

Specifications of MOD5234-100IR

Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
Synchronous DRAM Controller Module
The DACRs should be programmed as shown in
This configuration results in a value of DACR0 = 0xFF88_0300, as described in
DACR1 initialization is not needed because there is only one block. Subsequently,
DACR1[RE,IMRS,IP] should be cleared; everything else is a don’t care.
18-22
1 Mbyte
Setting
Setting
(hex)
(hex)
Field
Field RE
31–18
17–16
13–12
10–8
31
15
Bits
1
0
15
14
11
7
6
512 Kbyte
512 Kbyte
Bank 0
30
14
1
0
Name
CASL
IMRS
CBM
F
0
BA
RE
29
13
1
0
CASL
Figure 18-13. DACR Register Configuration
1 Mbyte
Table 18-28. DACR Initialization Values
1111_1111_
28
12
1000_10
1
0
Figure 18-12. SDRAM Configuration
Setting
011
00
00
0
0
0
0
0
27
11
1
0
MCF5235 Reference Manual, Rev. 2
Base address. So DACR0[31–16] = 0xFF88, placing the starting
address of the SDRAM accessible memory at 0xFF88_0000.
Reserved.
Keeps auto-refresh disabled because registers are being set up
at this time.
Reserved.
Indicates a delay of data 1 cycle after SD_SCAS is asserted
Reserved.
Command bit is pin 20 and bank selects are 21 and up.
Reserved.
Indicates
512 Kbyte
512 Kbyte
26
10
1
0
Bank 1
SDRAM Component
F
3
CBM
25
1
1
9
MRS
BA
1 Mbyte
command has not been initiated.
24
Figure
1
8
1
23
1
0
7
18-13.
Description
IMRS
22
0
0
6
512 Kbyte
512 Kbyte
Bank 2
8
0
21
0
0
5
PS
20
0
0
4
1 Mbyte
Accessible
Memory
IP
19
1
0
3
Freescale Semiconductor
18
0
0
2
512 Kbyte
512 Kbyte
8
0
Bank 3
Table
17
0
0
1
16
18-28.
0
0
0

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