MOD5234-100IR NetBurner Inc, MOD5234-100IR Datasheet - Page 713
MOD5234-100IR
Manufacturer Part Number
MOD5234-100IR
Description
MOD5234 10/100 ETHERNET MODULE
Manufacturer
NetBurner Inc
Type
Controllers & Processorsr
Datasheets
1.MOD5272-100IR.pdf
(3 pages)
2.MOD5234-100IR.pdf
(4 pages)
3.MOD5234-100IR.pdf
(754 pages)
Specifications of MOD5234-100IR
Interface
I²C, SPI, UART
Voltage - Supply
2.5V
Mounting Type
Surface Mount
Package / Case
Module
Product
Modules
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Format
-
Baud Rates
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
Q4483564
- Current page: 713 of 754
- Download datasheet (13Mb)
32.10.12 Microprogram Counter Debug Register (MPC)
The MPC register is a read-only register used for reading the microprogram counter value. This
register is only meaningful while the eTPU is halted. If accessed while the eTPU is not halted,
reads return zero.
32.10.13 Channel Flag Status Register (CFSR)
The CFSR register provides read-only access to the flags of the channel being serviced by the
eTPU. Reads to this register when the eTPU is out of halt mode return zero. Transition Detection
and Match Recognition flags are available in two versions: One reflecting the Branch Condition
Selection (BCC), TDL1/2 and MRL1/2, and an "internal" version, ITDL1/2 and IMR1/2,
reflecting the flag value within the channel logic.
Freescale Semiconductor
Address
Reset
Reset
Address
Reset
W
W
R
R SRI
W
R
31
15
V
0
0
31
0
0
30
14
N
0
0
Figure 32-54. Microprogram Counter Debug Register (MPC)
30
0
0
HSR
29
13
C
0
0
Figure 32-55. Channel Flag Status Register (CFSR)
29
0
0
28
12
Z
0
0
28
0
0
FLAG
MV
27
11
0
0
0
...
...
...
...
MCF5235 Reference Manual, Rev. 2
FLAG
MN
26
10
0
1
0
18
0
0
Client Select: ENGINE_SRC
Client Select: ENGINE_SRC
MRLE
MC
25
0
1
0
9
17
0
0
Register Index: 0x46
Register Index: 0x47
MRLE
MZ
16
24
0
0
0
2
0
8
TDL1 TDL2 MRL1 MRL2 LSR SMLCK
ITDL
15
0
23
0
1
0
7
ITDL
14
22
0
0
6
2
0
IMRL
13
0
21
EDM_ENGINE_MPC
0
1
0
5
IMRL
...
...
...
20
0
2
0
4
eTPU Debug Programming Model
PSS
0
3
19
0
0
3
PSTI
0
2
18
0
0
2
0
1
PSTO OBE
17
0
0
1
FM
0
0
32-69
16
0
0
0
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